Electrostatic Protection for Semiconductor Electronics

Abstract

Electrostatic-Discharge (ESD) is a particular concern for electronic semiconductor chips used in consumer, medical and military applications. Most people do not realize that when touching a chip or connecting a USB cable one can potentially damage the Integrated Circuit (IC) chip. The energy delivered by human handling or cable discharge can cause unexpected computer and electronic system failures. Understanding of this phenomena, controlling it at IC production and assembly sites, and designing circuits at the IC pins for harmlessly dissipating this energy threat is becoming extremely important for the future of technologies where the transistors are becoming more and more delicate. Demands for faster circuit performance and rapid advances in the IC packaging technology are further adding to the protection design constraints. This seminar will first outline the nature of ESD, the impact of technology advances, the challenges faced by the IC designers, and the specific package development issues that further restrict the ESD design. The package development work at Georgia Tech is especially important for these considerations. The seminar will identify the areas of package technology challenges and new areas of required innovation to maintain ESD reliability.