| Title: | Hardness assurance testing and radiation hardening by design techniques for silicon-germanium heterojunction bipolar transistors and digital logic circuits |
| Author: | Sutton, Akil Khamisi |
| Abstract: | Hydrocarbon exploration, global navigation satellite systems, computed tomography, and aircraft avionics are just a few examples of applications that require system operation at an ambient temperature, pressure, or radiation level outside the range covered by military specifications. The electronics employed in these applications are known as "extreme environment electronics." On account of the increased cost resulting from both process modifications and the use of exotic substrate materials, only a handful of semiconductor foundries have specialized in the production of extreme environment electronics. Protection of these electronic systems in an extreme environment may be attained by encapsulating sensitive circuits in a controlled environment, which provides isolation from the hostile ambient, often at a significant cost and performance penalty. In a significant departure from this traditional approach, system designers have begun to use commercial off-the-shelf technology platforms with built in mitigation techniques for extreme environment applications. Such an approach simultaneously leverages the state of the art in technology performance with significant savings in project cost. Silicon-germanium is one such commercial technology platform that demonstrates potential for deployment into extreme environment applications as a result of its excellent performance at cryogenic temperatures, remarkable tolerance to radiation-induced degradation, and monolithic integration with silicon-based manufacturing. In this dissertation the radiation response of silicon-germanium technology is investigated, and novel transistor-level layout-based techniques are implemented to improve the radiation tolerance of HBT digital logic. |
| Type: | Dissertation |
| URI: | http://hdl.handle.net/1853/29778 |
| Date: | 2009-05-04 |
| Publisher: | Georgia Institute of Technology |
| Subject: |
Bit error rate testing
Displacement damage Heterojunction bipolar transistor Radiation effects Radiation hardening by design Silicon germanium Single event upset Ionization Heterojunctions Bipolar transistors Logic circuits Radiation hardening Hardness Germanium compounds Silicon compounds Extreme environments |
| Department: | Electrical and Computer Engineering |
| Advisor: | Committee Chair: Cressler, John; Committee Member: Deo, Chaitanya; Committee Member: Doolittle, Alan; Committee Member: Keezer, David; Committee Member: May, Gary; Committee Member: Papapolymerou, John |
| Degree: | Ph.D. |
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