A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology
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http://hdl.handle.net/1853/7578
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Title:
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A Power Optimized Pipelined Analog-to-Digital Converter Design in Deep Sub-Micron CMOS Technology |
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Author:
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Cho, Chang-Hyuk
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Abstract:
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High-speed, medium-resolution, analog-to-digital converters (ADCs) are important building blocks in a wide range of applications. High-speed, medium-resolution ADCs have been implemented by various ADC architectures such as a folding ADC, a subranging ADC, and a pipeline ADC. Among them, pipeline ADCs have proven to be efficient architectures for applications such as digital communication systems, data acquisition systems and video systems. Especially, power dissipation is a primary concern in applications requiring portability. Thus, the objective of this work is to design and build a low-voltage low-power medium-resolution (8-10bits) high-speed pipeline ADC in deep sub-micron CMOS technology.
The non-idealities of the circuit realization are carefully investigated in order to identify the circuit requirements for a low power circuit design of a pipeline ADC. The resolution per stage plays an important role in determining overall power dissipation of a pipeline ADC. The pros and cons of both large and small number of bits per-stage are examined. A power optimization algorithm is developed to decide more accurately which approach is better for lower power dissipation. Both identical and non-identical number of bit per-stage approaches are considered and their differences are analyzed.
A low-power, low-voltage 10-bit 100Msamples/s pipeline ADC was designed and implemented in a 0.18mm CMOS process. The power consumption was minimized with the right selection of the per-stage resolution based on the result of the power optimization algorithm and by the scaling down the sampling capacitor size in subsequent stages. |
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Type:
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Dissertation |
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URI:
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http://hdl.handle.net/1853/7578
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Date:
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2005-11-28 |
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Publisher:
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Georgia Institute of Technology |
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Subject:
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CMOS analog circuits
Data converters
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Department:
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Electrical and Computer Engineering
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Advisor:
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Committee Chair: Allen, Phillip E.; Committee Member: Callen, W. Russell; Committee Member: Kenney, James Stevenson; Committee Member: Leach, Marshall; Committee Member: Morley, Thomas |
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Degree:
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Ph.D. |
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