Reworkable No-Flow Underfills for Flip Chip Applications
Abstract
Underfill is a polymeric material used in the flip-chip devices that fills the gap between the integrated circuit (IC) chip and the substrate (especially on the organic printed circuit board),
and encapsulates the solder interconnects. This underfill can
dramatically enhance the reliability of the flip-chip devices as
compared to the nonunderfilled devices. No-flow (compress-flow) underfill is a new type of underfill that allows simultaneous solder bump reflow and underfill cure, which leads to a more efficient no-flow underfilling process as compared to the standard capillary-flow underfilling process. Reworkable underfill is another type of underfill that allows the faulty chips to be replaced individually. It is the key material to address the nonreworkability issue of the current flip-chip devices. Reworkability is especially important to the no-flow underfill because electrical test of the
assembled chips can only be done at the end of the no-flow underfilling process. The goal of this study is to demonstrate the feasibility of a no-flow reworkable underfill. Two approaches are taken to develop this new type of underfill. The first one is to add a special additive into a standard no-flow underfill formulation (underfill 0) to make it reworkable, called underfill 1. The second approach is to develop a no-flow underfill based
on a new thermally degradable epoxy resin that decomposes around 240℃, called underfill 2. Comparing to underfill 0, these
two underfills have similar properties including glass transition temperature (T[subscript g]), coefficient of thermal expansion (CTE) and modulus. Underfill 1 has similar curing and fluxing capability
as to underfill 0. Underfill 2 cures faster than underfill 0, and it has slightly weaker fluxing capability than underfill 0, but it still allows 100% of solder bumps wetting and collapsing on the copper
board. Moreover, underfill 1 and underfill 2 allow the flip chips to be reworked using a developed rework process while underfill
0 does not.
Collections
Related items
Showing items related by title, author, creator and subject.
-
Void Formation Study of Flip Chip in Package Using No-Flow Underfill
Lee, Sangil; Yim, Myung Jin; Master, Raj N.; Wong, C. P.; Baldwin, Daniel F. (Georgia Institute of TechnologyInstitute of Electrical and Electronics Engineers, Inc., 2008-10)The advanced flip chip in package (FCIP) process using no-flow underfill material for high I/O density and fine-pitch interconnect applications presents challenges for an assembly process that must achieve high electrical ... -
Near Void-Free Assembly Development of Flip Chip Using No-Flow Underfill
Lee, Sangil; Yim, Myung Jin; Master, Raj N.; Wong, C. P.; Baldwin, Daniel F. (Georgia Institute of TechnologyInstitute of Electrical and Electronics Engineers, 2009-04)The advanced flip-chip-in-package (FCIP) process technology, using no-flow underfill material for high I/O density (over 3000 I/O) and fine-pitch (down to 150 μm) interconnect applications, presents challenges for flip ... -
Study on Underfill/Solder Adhesion in Flip-Chip Encapsulation
Wong, C. P.; Fan, Lianhua; Tison, Christopher K. (Georgia Institute of TechnologyInstitute of Electrical and Electronics Engineers, Inc., New York, 2002-11)Underfill materials are employed in flip-chip assemblies to enhance solder joint reliability performance. The adhesion of underfills with solders is important to the integrity of the flip-chip structure. We have studied ...