High Speed Memory Centric Protection on Software Execution Using One-Time-Pad Prediction

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Please use this identifier to cite or link to this item: http://hdl.handle.net/1853/112

Title: High Speed Memory Centric Protection on Software Execution Using One-Time-Pad Prediction
Author: Shi, Weidong ; Lee, Hsien-Hsin Sean ; Lu, Chenghuai ; Ghosh, Mrinmoy
Abstract: This paper presents a new security model for protecting software confidentiality. Different from the previous process-centric systems designed for the same purpose, the new model ties cryptographic properties and security attributes to memory instead of a user process. The advantages of such memory centric design over the previous process-centric design are two folds. First, it provides a better security model and access control on software confidentiality that supports both selective and mixed software encryption. Second, the new model supports and facilitates information sharing in an open software system where both confidential data and code could be shared by different user processes without unnecessary duplication as required by the process-centric approach. Furthermore, the paper addresses the latency issue of executing one-time-pad (OTP) encrypted software through a novel OTP prediction technique. One-time-pad based protection schemes on data confidentiality can improve performance over block-cipher based protection approaches by parallelizing data fetch and OTP generation when a sequence number associated with a missing cache block is cached on-chip. On a sequence number cache miss, OTP generation can not be started until the missing sequence number is fetched from the memory. Since the latency of OTP generation is in the magnitude of the order of hundreds of core CPU cycles, it becomes performance critical to have OTP ready as soon as possible. OTP prediction meets this challenge by using idle decryption engine cycles to speculatively compute OTPs for memory blocks whose sequence number are missing in the cache. Profiling and simulation results show that significant performance improvement using speculative OTP over regular OTP under both small 4KB and large sequence number cache settings 32KB due to the capability of speculative OTP technique to reduce misses on sequence number. The performance improvement is in the range from 15% to 25% for seven SPEC2000 benchmarks. The new access control protection and OTP prediction scheme requires only small amount of additional hardware resources over the existing proposed tamper resistant system but with greatly improved performance, protection, flexibility, and inter-operability.
Type: Technical Report
URI: http://hdl.handle.net/1853/112
Date: 2004-07-23
Relation: CERCS;GIT-CERCS-04-27
Publisher: Georgia Institute of Technology
Subject: Software confidentiality
OTP prediction schemes
Decryption engine cycles
Memory centric designs
Performance improvement

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