Fast-Flow Underfill Encapsulant: Flow Rate and Coefficient of Thermal Expansion
Wong, C. P.
Vincent, Michael Brien
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In the flip-chip on board assembly method, an underfill encapsulant material is applied in the gap between the integrated circuit (IC) chip and substrate to distribute the shear stresses at the solder interconnects. These shear stresses are imposed on the solder interconnects due to a coefficient of thermal expansion (CTE) mismatch between the IC chip and substrate. Different technologies such as fast-flow, no-flow, and reworkable underfills are currently being studied for flip-chip underfill encapsulant materials. This paper looks at the underfill encapsulant used in the fast-flow method of underfilling the IC chip/substrate gap. The effect of filler loading, particle size, and particle size distribution on the flow rate and CTE of the fastflow underfill material are discussed in this work. The material used for the experiments is an epoxy resin with added silica filler to decrease the CTE. This study focuses on what effect different filler characteristics have on the underfill encapsulant. Also, an underfill encapsulant that can compete with one of industry’s faster fast-flow underfills was developed as a result of this work.