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dc.contributor.authorSrinivasan, Venkateshen_US
dc.date.accessioned2006-09-01T19:36:00Z
dc.date.available2006-09-01T19:36:00Z
dc.date.issued2006-07-10en_US
dc.identifier.urihttp://hdl.handle.net/1853/11588
dc.description.abstractIn this work, programmable analog techniques using floating-gate transistors have been developed to design precision analog circuits, low-power signal processing primitives and adaptive systems that learn on-chip. Traditional analog implementations lack programmability with the result that issues such as mismatch are corrected at the expense of area. Techniques have been proposed that use floating-gate transistors as an integral part of the circuit of interest to provide both programmability and the ability to correct for mismatch. Traditionally, signal processing has been performed in the digital domain with analog circuits handling the interface with the outside world. Such a partitioning of responsibilities is inefficient as signal processing involves repeated multiplication and addition operations that are both very power efficient in the analog domain. Using programmable analog techniques, fundamental signal processing primitives such as multipliers have been developed in a low-power fashion while preserving accuracy. This results in a paradigm shift in signal processing. A co-operative analog/digital signal processing framework is now possible such that the partitioning of tasks between the analog and digital domains is performed in a power efficient manner. Complex signal processing tasks such as adaptive filtering that learn the weight coefficients are implemented by exploiting the non-linearities inherent with floating-gate programming. The resulting floating-gate synapses are compact, low-power and offer the benefits of non-volatile weight storage. In summary, this research involves developing techniques for improving analog circuit performance and in developing power-efficient techniques for signal processing and on-chip learning.en_US
dc.format.extent1875447 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technologyen_US
dc.subjectProgrammable multipliersen_US
dc.subjectAdaptive filters
dc.subjectVoltage references
dc.subjectOffset cancellation
dc.subjectFloating-gate transistors
dc.subjectSynapse
dc.subject.lcshNeural networks (Computer science)en_US
dc.subject.lcshSignal processingen_US
dc.subject.lcshAdaptive signal processingen_US
dc.subject.lcshElectronic analog computers Circuitsen_US
dc.subject.lcshGate array circuitsen_US
dc.titleProgrammable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learningen_US
dc.typeDissertationen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.advisorCommittee Chair: Dr. Paul Hasler; Committee Member: Dr. Alan Doolittle; Committee Member: Dr. David Anderson; Committee Member: Dr. Farrokh Ayazi; Committee Member: Dr. Mark Smithen_US


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