A parallel digital interconnect test methodology for multi-chip module substrate networks

Please use this identifier to cite or link to this item: http://hdl.handle.net/1853/13847

Title:	A parallel digital interconnect test methodology for multi-chip module substrate networks
Author:	Newman, Kimberly Eileen
Type:	Dissertation
URI:	http://hdl.handle.net/1853/13847
Date:	1999-05
Publisher:	Georgia Institute of Technology
Subject:	Multichip modules (Microelectronics) Testing Parallel processing (Electronic computers)
Department:	Electrical and Computer Engineering Electric Engineering
Advisor:	David Keezer
Degree:	Ph.D.

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Georgia Tech Theses and Dissertations [17727]
School of Electrical and Computer Engineering Theses and Dissertations [2289]

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