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dc.contributor.authorMinz, Jacob Rajkumaren_US
dc.date.accessioned2007-03-27T18:15:37Z
dc.date.available2007-03-27T18:15:37Z
dc.date.issued2006-08-03en_US
dc.identifier.urihttp://hdl.handle.net/1853/14012
dc.description.abstractThe focus of this research was to develop interconnect-centric physical design tools for 3D technologies. A new routing model for the SOP structure was developed which incorporated the 3D structure and formalized the resource structure that facilitated the development of the global routing tool. The challenge of this work was to intelligently convert the 3D SOP routing problem into a set of 2D problems which could be solved efficiently. On the lines of MCM, the global routing problem was divided into a number of phases namely, coarse pin distribution, net distribution, detailed pin distribution, topology generation, layer assignment, channel assignment and local routing. The novelty in this paradigm is due to the feed-through vias needed by the nets which traverse through multiple placement layers. To gain further improvements in performance, optical routing was proposed and a cost analysis study was done. The areas for the placement of waveguides were efficiently determined, which reduced delays and maximized utilization. The global router developed was integrated into a simulated-annealing based floorplanner to investigate trade-offs of various objectives. Since power-supply noise suppression is of paramount importance in SOP, a model was developed for the SOP power-supply network. Decap allocation, and insertion were also integrated into the framework. The challenges in this work were to integrate computationally intensive analysis tools with a floorplanning that works to its best efficency provided the evaluation of the cost functions are rapid. Trajectory-based approaches were used to sample representative data points for congestion analysis and interpolate the the congestion metric during the optimization schedule. Efficient algorithms were also proposed for 3D clock routing, which acheived equal skews under uniform and worst thermal profiles. Other objectives such as wirelength, through-vias, and power were also handled.en_US
dc.format.extent885709 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technologyen_US
dc.subjectPhysical designen_US
dc.subject3D technologiesen_US
dc.subject.lcshVirtual realityen_US
dc.subject.lcshThree-dimensional imagingen_US
dc.subject.lcshIntegrated circuits Large scale integrationen_US
dc.titlePhysical Design Automation for System-on-Packages and 3D-Integrated Circuitsen_US
dc.typeDissertationen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.advisorCommittee Chair: Sung-Kyu Lim; Committee Member: Abhijit Chatterjee; Committee Member: Gabriel H. Loh; Committee Member: Gabriel Rincon-Mora; Committee Member: Madhavan Swaminathanen_US


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