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dc.contributor.authorGhosh, Mrinmoyen_US
dc.date.accessioned2009-06-08T19:34:16Z
dc.date.available2009-06-08T19:34:16Z
dc.date.issued2009-04-03en_US
dc.identifier.urihttp://hdl.handle.net/1853/28265
dc.description.abstractThis thesis states that dynamic profiling of the memory reference stream can improve energy and performance in the memory hierarchy. The research presented in this theses provides multiple instances of using lightweight hardware structures to profile the memory reference stream. The objective of this research is to develop microarchitectural techniques to reduce energy consumption at different levels of the memory hierarchy. Several simple and implementable techniques were developed as a part of this research. One of the techniques identifies and eliminates redundant refresh operations in DRAM and reduces DRAM refresh power. Another, reduces leakage energy in L2 and higher level caches for multiprocessor systems. The emphasis of this research has been to develop several techniques of obtaining energy savings in caches using a simple hardware structure called the counting Bloom filter (CBF). CBFs have been used to predict L2 cache misses and obtain energy savings by not accessing the L2 cache on a predicted miss. A simple extension of this technique allows CBFs to do way-estimation of set associative caches to reduce energy in cache lookups. Another technique using CBFs track addresses in a Virtual Cache and reduce false synonym lookups. Finally this thesis presents a technique to reduce dynamic power consumption in level one caches using significance compression. The significant energy and performance improvements demonstrated by the techniques presented in this thesis suggest that this work will be of great value for designing memory hierarchies of future computing platforms.en_US
dc.publisherGeorgia Institute of Technologyen_US
dc.subjectEnergyen_US
dc.subjectCacheen_US
dc.subjectDramen_US
dc.subjectMicroarchitectureen_US
dc.subject.lcshMemory management (Computer science) Power supply
dc.subject.lcshComputer architecture
dc.titleMicroarchitectural techniques to reduce energy consumption in the memory hierarchyen_US
dc.typeDissertationen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.advisorCommittee Chair: Lee, Hsien-Hsin S.; Committee Member: Cahtterjee,Abhijit; Committee Member: Mukhopadhyay, Saibal; Committee Member: Pande, Santosh; Committee Member: Yalamanchili, Sudhakaren_US


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