High-density capacitor array fabrication on silicon substrates
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System integration and miniaturization demands are driving integrated thin film capacitor technologies with ultra-high capacitance densities for power supply integrity and efficient power management. The emerging need for voltage conversion and noise-free power supply in bioelectronics and portable consumer products require ultra high-density capacitance of above 100 μF/cm2 with BDV 16-32 V ,independent capacitor array terminals and non-polar dielectrics. The aim of this research,therefore, is to explore a new silicon- compatible thin film nanoelectrode capacitor technology that can meet all these demands. The nanoelectrode capacitor paradigm has two unique advances. The first advance is to achieve ultra-high surface area thin film electrodes by sintering metallic particles directly on a silicon substrate at CMOS- compatible temperatures. The second advance of this study is to conformally- deposit medium permittivity dielectrics over such particulate nanoelectrodes using Atomic Layer Deposition (ALD) process. Thin film copper particle nanoelectrode with open-porous structure was achieved by choosing a suitable phosphate-ester dispersant, solvent and a sacrificial polymer for partial sintering of copper particles to provide a continuous high surface area electrode. Capacitors with conformal ALD alumina as the dielectric and Polyethylene dioxythiophene (PEDT) as the top electrode showed 30X enhancement in capacitance density for a 20-30 micron copper particulate bottom electrode and 150X enhancement of capacitance density for a 75 micron electrode. These samples were tested for their mechanical and electrical properties by using characterization techniques such as SEM, EDS, I-V and C-V plots. A capacitance density of 30 μF/cm2 was demonstrated using this approach. The technology is extensible to much higher capacitance densities with better porosity control, reduction in particle size and higher permittivity dielectrics.