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dc.contributor.authorHyun, Seok Hunen_US
dc.date.accessioned2005-03-01T19:41:21Z
dc.date.available2005-03-01T19:41:21Z
dc.date.issued2004-11-22en_US
dc.identifier.urihttp://hdl.handle.net/1853/4903
dc.description.abstractMany researchers and engineers designing laser drivers for data rates at or above 10 gigabits per second (Gbps) implemented their designs using integrated circuit technologies that provide high bandwidth and good quality passive components such as GaAs, silicon bipolar, and InP. However, in low-cost and high volume short-haul applications at data rates of around 10 Gbps (such as LAN, MAN, and board-to-board interconnection), there has been an increasing interest in commercial CMOS technology for implementing the laser driver. This is because CMOS technology has unique advantages such as low power and low cost of fabrication that are the result of high yield and a high degree of integration. Therefore, the objective of this research in this dissertation is to investigate the possibility of implementing a high-speed CMOS laser driver for these cost sensitive applications. The high-speed CMOS laser drivers designed in this research are of two types. The first type is a low power laser driver for driving a vertical cavity surface emitting laser (VCSEL). The other driver type is a high current laser driver for driving edge-emitting lasers such as double-heterojunction (DH), multiquantum well (MQW), or Febry-Perrot (FP) lasers. The parasitic effects of the layout geometry are crucial in the design of the high-speed laser drivers. Thus, in this research, all simulations contain a complete set of parasitic elements extracted from the layout of the laser driver. To test laser drivers, chip-on-board (COB) technology is employed, and printed circuit boards (PCBs) to test the laser drivers are designed at the same time as the laser drivers themselves and manufactured specifically for these tests. This research makes two significant new contributions to the technology that are reported and described here. One is the first 10 Gbps performance of a differential CMOS laser driver with better than 10-14 bit-error-rate (BER). The second is the first demonstration of a heterogeneous integration method to integrate independently grown and customized thin film lasers onto CMOS laser driver circuits to form an optical transmitter.en_US
dc.format.extent2697790 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technologyen_US
dc.subjectOptical communicationsen_US
dc.subjectLaser driver
dc.subjectCMOS
dc.subjectHybrid integration
dc.titleDesign of High-Speed Laser Driver Using a Standard CMOS Technology for Optical Data Transmissionen_US
dc.typeDissertationen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.advisorCommittee Chair: Martin Brooke; Committee Member: Bernard Kippelen; Committee Member: David Schimmel; Committee Member: Paul Hasler; Committee Member: Paul Kohlen_US


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