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dc.contributor.advisorSitaraman, Suresh K.
dc.contributor.authorMcCann, Scott R.
dc.date.accessioned2014-05-22T15:33:23Z
dc.date.available2014-05-22T15:33:23Z
dc.date.created2014-05
dc.date.issued2014-04-04
dc.date.submittedMay 2014
dc.identifier.urihttp://hdl.handle.net/1853/51889
dc.description.abstractAs the microelectronic industry moves toward stacking of dies to achieve greater performance and smaller footprint, there are several reliability concerns when assembling the stacked dies on current organic substrates. These concerns include excessive warpage, interconnect cracking, die cracking, and others. Silicon interposers are being developed to assemble the stacked dies, and then the silicon interposers are assembled on organic substrates. Although such an approach could address stacked-die to interposer reliability concerns, there are still reliability concerns between the silicon interposer and the organic substrate. This work examines the use of diced glass panel as an interposer, as glass provides intermediate coefficient of thermal expansion between silicon and organics, good mechanical rigidity, large-area panel processing for low cost, planarity, and better electrical properties. However, glass is brittle and low in thermal conductivity, and there is very little work in existing literature to examine glass as a potential interposer material. Starting with a 150 x 150 mm glass panel with a thickness of 100 µm, this work has built alternating layers of dielectric and copper on both sides of the panel. The panels have gone through typical cleanroom processes such as lithography, electroplating, etc. Upon fabrication, the panels are diced into individual substrates of 25 x 25 mm and a 10 x 10 mm flip chip with a solder bump pitch of 75 um is then reflow attached to the glass substrate followed by underfill dispensing and curing. The warpage of the flip-chip assembly is measured. In parallel to the experiments, numerical models have been developed. These models account for viscoplastic behavior of the solder. The models also mimic material addition and etching through element “birth-and-death” approach. The warpage from the models has been compared against experimental measurements for glass substrates with flip chip assembly. It is seen that the glass substrates provide significantly lower warpage compared to organic substrates, and thus could be a potential candidate for future 3D systems.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technology
dc.subjectWarpage
dc.subjectShadow moire
dc.subjectFinite element
dc.subjectProcess modeling
dc.subjectMicroelectronic packaging
dc.subjectGlass interposer
dc.subject.lcshMicroelectronics
dc.subject.lcshFinite element method
dc.subject.lcshElectronic packaging
dc.titleExperimental and theoretical assessment of thin glass panels as interposers for microelectronic packages
dc.typeThesis
dc.description.degreeM.S.
dc.contributor.departmentMechanical Engineering
thesis.degree.levelMasters
dc.contributor.committeeMemberTummala, Rao R.
dc.contributor.committeeMemberJoshi, Yogendra
dc.date.updated2014-05-22T15:33:23Z


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