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dc.contributor.advisorChatterjee, Abhijit
dc.contributor.authorBanerjee, Aritra
dc.date.accessioned2015-01-12T20:27:58Z
dc.date.available2015-01-13T06:30:04Z
dc.date.created2013-12
dc.date.issued2013-08-13
dc.date.submittedDecember 2013
dc.identifier.urihttp://hdl.handle.net/1853/52919
dc.description.abstractWith more and more integration of analog and RF circuits in scaled CMOS technologies, process variation is playing a critical role which makes it difficult to achieve all the performance specifications across all the process corners. Moreover, at scaled technology nodes, due to lower voltage and current handling capabilities of the devices, they suffer from reliability issues that reduce the overall lifetime of the system. Finally, traditional static style of designing analog and RF circuits does not result in optimal performance of the system. A new design paradigm is emerging toward digitally assisted analog and RF circuits and systems aiming to leverage digital correction and calibration techniques to detect and compensate for the manufacturing imperfections and improve the analog and RF performance offering a high level of integration. The objective of the proposed research is to design digital friendly and performance tunable adaptive analog/RF circuits and systems with digital enhancement techniques for higher performance, better process variation tolerance, and more reliable operation and developing strategy for testing the proposed adaptive systems. An adaptation framework is developed for process variation tolerant RF systems which has two parts – optimized test stimulus driven diagnosis of individual modules and power optimal system level tuning. Another direct tuning approach is developed and demonstrated on a carbon nanotube based analog circuit. An adaptive switched mode power amplifier is designed which is more digital-intensive in nature and has higher efficiency, improved reliability and better process resiliency. Finally, a testing strategy for adaptive RF systems is shown which reduces test time and test cost compared to traditional testing.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technology
dc.subjectAdaptive analog/RF
dc.subjectDigitally assisted analog
dc.subjectProcess variation tolerant
dc.subjectDiagnosis
dc.subjectPerformance tuning
dc.subjectPower amplifier
dc.subjectReliability
dc.subjectCarbon nanotube transistor
dc.subjectTesting
dc.titleDesign of digitally assisted adaptive analog and RF circuits and systems
dc.typeDissertation
dc.description.degreePh.D.
dc.contributor.departmentElectrical and Computer Engineering
dc.embargo.terms2014-12-01
thesis.degree.levelDoctoral
dc.contributor.committeeMemberWang, Hua
dc.contributor.committeeMemberKeezer, David
dc.contributor.committeeMemberZajic, Alenka
dc.contributor.committeeMemberKumar, Satish
dc.date.updated2015-01-12T20:27:58Z


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