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dc.contributor.authorDugger, Jeffery Donen_US
dc.date.accessioned2005-03-04T16:43:58Z
dc.date.available2005-03-04T16:43:58Z
dc.date.issued2003-11-26en_US
dc.identifier.urihttp://hdl.handle.net/1853/5294
dc.description.abstractResearch presented in this thesis provides a substantial leap from the study of interesting device physics to fully adaptive analog networks and lays a solid foundation for future development of large-scale, compact, low-power adaptive parallel analog computation systems. The investigation described here started with observation of this potential learning capability and led to the first derivation and characterization of the floating-gate pFET correlation learning rule. Starting with two synapses sharing the same error signal, we progressed from phase correlation experiments through correlation experiments involving harmonically related sinusoids, culminating in learning the Fourier series coefficients of a square wave cite{kn:Dugger2000}. Extending these earlier two-input node experiments to the general case of correlated inputs required dealing with weight decay naturally exhibited by the learning rule. We introduced a source-follower floating-gate synapse as an improvement over our earlier source-degenerated floating-gate synapse in terms of relative weight decay cite{kn:Dugger2004}. A larger network of source-follower floating-gate synapses was fabricated and an FPGA-controlled testboard was designed and built. This more sophisticated system provides an excellent framework for exploring applications to multi-input, multi-node adaptive filtering applications. Adaptive channel equalization provided a practical test-case illustrating the use of these adaptive systems in solving real-world problems. The same system could easily be applied to noise and echo cancellation in communication systems and system identification tasks in optimal control problems. We envision the commercialization of these adaptive analog VLSI systems as practical products within a couple of years.en_US
dc.format.extent1137791 bytes
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technologyen_US
dc.subjectFloating gate transistorsen_US
dc.subjectNeural networks
dc.subjectAdaptive filters
dc.subjectVLSI
dc.subjectAnalog electronics
dc.titleAdaptive Analog VLSI Signal Processing and Neural Networksen_US
dc.typeDissertationen_US
dc.description.degreePh.D.en_US
dc.contributor.departmentElectrical and Computer Engineeringen_US
dc.description.advisorCommittee Chair: Paul Hasler; Committee Member: David Anderson; Committee Member: Dieter Jaeger; Committee Member: Mark Clements; Committee Member: Steve Deweerthen_US


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