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dc.contributor.advisorMilor, Linda S.
dc.contributor.authorChen, Chang-Chih
dc.date.accessioned2015-01-12T20:50:32Z
dc.date.available2015-01-12T20:50:32Z
dc.date.created2014-12
dc.date.issued2014-08-25
dc.date.submittedDecember 2014
dc.identifier.urihttp://hdl.handle.net/1853/53033
dc.description.abstractFrontend and backend wearout mechanisms are major reliability concerns for modern microprocessors. In this research, a framework which contains modules for negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), hot carrier injection (HCI), gate-oxide breakdown (GOBD), backend time-dependent dielectric breakdown (BTDDB), electromigration (EM), and stress-induced voiding (SIV) is proposed to analyze the impact of each wearout mechanism on state-of-art microprocessors and to accurately estimate microprocessor lifetimes due to each wearout mechanism. Taking into account the detailed thermal profiles, electrical stress profiles and a variety of use scenarios, composed of a fraction of time in operation, a fraction of time in standby, and a fraction of time when the system is off, this work provides insight into lifetime-limiting wearout mechanisms, along with the reliability-critical microprocessor functional units for a system. This enables circuit designers to know if their designs will achieve an adequate lifetime and further make any updates in the designs to enhance reliability prior to committing the designs to manufacture.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technology
dc.subjectMicroprocessor
dc.subjectReliability
dc.subjectModeling
dc.subjectNegative bias temperature instability
dc.subjectPositive bias temperature instability
dc.subjectHot carrier injection
dc.subjectTiming analysis
dc.subjectAging
dc.subjectSRAM
dc.subjectCache
dc.subjectGate oxide breakdown
dc.subjectWearout
dc.subjectElectromigration
dc.subjectStress-induced voiding
dc.subjectStress migration
dc.subjectTime-dependent backend dielectric breakdown
dc.titleSystem-level modeling and reliability analysis of microprocessor systems
dc.typeDissertation
dc.description.degreePh.D.
dc.contributor.departmentElectrical and Computer Engineering
thesis.degree.levelDoctoral
dc.contributor.committeeMemberKeezer, David
dc.contributor.committeeMemberNaeemi, Azad
dc.contributor.committeeMemberChatterjee, Abhijit
dc.contributor.committeeMemberKim, Hyesoon
dc.date.updated2015-01-12T20:50:32Z


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