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dc.contributor.advisorMay, Gary S.
dc.contributor.authorMevawalla, Zubin
dc.date.accessioned2015-06-08T18:02:14Z
dc.date.available2015-06-08T18:02:14Z
dc.date.created2015-05
dc.date.issued2015-01-05
dc.date.submittedMay 2015
dc.identifier.urihttp://hdl.handle.net/1853/53382
dc.description.abstractManufacturers address the distinct operational objectives of product innovation and manufacturing efficiency by having separate fabrication facilities (“fabs”) for development and manufacturing. Additionally, the industrial manufacture of a semiconductor product proceeds through several stages of production. These are typically a research and development (R&D) stage, a ramping stage, and a manufacturing stage. These production stages are distributed over the different fabs. These differences in fabrication environment and stage of production result in differences in the characteristics of production of a semiconductor product over its manufacturing lifetime. Some examples of these differences are device yield, breadth of processing conditions, throughput, number of reaction chambers operating in parallel, metrology, and data collection. These differences are reflected in the data available in the fab databases. This research explores the use of a neural network modeling and genetic algorithm optimization method with these different datasets. The focus is on a high-aspect-ratio etch process across the different fabs and production stages. Models are built from process input variables to post-process metrology, and from process input variables to yield metrics. In the latter case, there can be tens of processes occurring between the model input and output variables. I demonstrate the usefulness and industrial application of neural network process modeling and genetic algorithm recipe optimization by performing a reaction chamber matching exercise on a manufacturing line. The performance of a reaction chamber can deviate from target, either in terms of its post-process metrology or its associated yield metrics. The method developed herein generated an optimized recipe that brought the outlying behavior of a chamber closer to target and closer to that of the other chambers (“chamber matching”). This is one of many possible applications. It was chosen because it demonstrates both the fidelity of the process models and the effectiveness of the optimization algorithm.
dc.format.mimetypeapplication/pdf
dc.publisherGeorgia Institute of Technology
dc.subject
dc.subjectSemiconductor manufacturing
dc.subjectNeural networks
dc.subjectMachine learning
dc.subjectProcess modeling
dc.subjectProcess control
dc.subjectChamber matching
dc.titleProcess modeling and optimization using industrial semiconductor fabrication data
dc.typeDissertation
dc.description.degreePh.D.
dc.contributor.departmentElectrical and Computer Engineering
thesis.degree.levelDoctoral
dc.contributor.committeeMemberFrazier, Albert B.
dc.contributor.committeeMemberMilor, Linda S.
dc.contributor.committeeMemberBakir, Muhannad S.
dc.contributor.committeeMemberKohl, Paul A.
dc.date.updated2015-06-08T18:02:14Z


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