Load-Aware Power Conversion and Integration for Heterogeneous Systems
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In this thesis we develop a holistic co-design approach to optimize the conversion systems in order to perform relevant trade-offs taking into account system-level converter, load and packaging. We look at the interactions between processing power, the integration scheme and how it affects the converter in terms of size, design and performance. In Chapter 1 introduces the problem to be addressed, chapter 2 is a literature survey of the state-of-the-art power reduction techniques as well as a comparison between different power converter topologies and how compatible they are with power saving techniques. Chapter 3 presents compares behavioral models of Switch Inductor (SI) based dynamic voltage scaling topologies, the Single-Inductor-Multiple-Output (SIMO) is compared against a Multiple-Inductor-Multiple-Output (MIMO) approach and the results motivate further research into SIMO control techniques. Chapter 4 presents a digitally adjustable Single-Inductor Multiple-Output (SIMO) control technique to address cross-regulation and power loss reduction, the control technique is then compared against classic MIMO closed-loop control techniques. Chapter 5 presents the circuit implementation and measurements of a test-chip fabricated in a 130nm process as a proof of concept to the developed Power Weighting controller. With the emergence of advanced packaging technologies it is important to analyze the potential of power converter integration schemes. Chapter 5 looks at different integration options for the converter-processor system. With the emergence of 3D-integrated chip stacking, the converter integration has the advantage of reduced parasitics but increased thermal coupling. The SI converter is evaluated and compared using different integration schemes (off-die, on-package, 3D) and it is shown how to properly design the converter to take advantage of the denser integration. A thermoelectric modeling framework is created to study the thermoelectric behavior of a fully integrated SI converter with processor die. This thesis finalizes with an analysis of the integration for a SIMO converter that is 3D-stacked with a multi-core processor die, the analysis of the regulation capabilities and thermal transient simulations of the SIMO system are discussed. It is found that the SIMO is a suitable alternative to perform multi-domain voltage conversion, however, the tighter integration and higher temperatures means that the passives parasitics play a large role in how efficient the conversion is. Thus, improvements on the quality of passives are still required in order to achieve high-quality and high-efficiency energy conversion. The thesis concludes up with a summary of the findings in terms of functional advantages of the SIMO topology as well as performance constraints found.