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dc.date.accessioned2017-05-12T14:26:10Z
dc.date.available2017-05-12T14:26:10Z
dc.date.issued10/22/2013
dc.identifier.urihttp://hdl.handle.net/1853/56818
dc.description.abstractAn exemplary embodiment of the present invention provides a chip for use in fabricating a three-dimensional integrated circuit, the chip comprising a wafer, one or more metallic-filled, electrical vias, and one or more hollow, fluidic vias. The wafer can comprise a first surface and a second surface. The one or more metallic-filled, electrical vias can extend through the wafer. Each electrical via can be in electrical communication with an electrical interconnect proximate the first surface, providing electrical communication between chips in the integrated circuit. The one or more hollow, fluidic vias can extend through the wafer. Each fluidic via can be in fluid communication with a fluidic interconnect, providing fluid communication between adjacent chips in the integrated circuit. Each fluidic interconnect can comprise a first end proximate the first surface, a second end, and a cap proximate the second end, defining an air-filled space within the fluidic interconnect.
dc.titleAir-gap C4 Fluidic I/O Interconnects And Methods Of Fabricating Same
dc.typePatent
dc.contributor.patentcreatorKing Jr., Calvin Richard
dc.contributor.patentcreatorZevari, Jesal
dc.contributor.patentcreatorMeindl, James D.
dc.contributor.patentcreatorBakir, Muhannad S.
dc.identifier.patentnumber8563365
dc.description.assigneeGeorgia Tech Research Corporation
dc.identifier.patentapplicationnumber13/416849
dc.date.filed3/9/2012
dc.identifier.uspc438/122
dc.identifier.cpcH01L23/473
dc.identifier.cpcH01L23/481
dc.identifier.cpcH01L25/0657


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