Methods For Passivating Silicon Devices At Low Temperature To Achieve Low Interface State Density And Low Recombination Velocity While Preserving Carrier Lifetime
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A new process has been developed to achieve a very low SiOx /Si interface state density Dit, low recombination velocity S (5 ms) for oxides deposited on silicon substrates at low temperature. The technique involves direct plasma-enhanced chemical vapor deposition (PECVD), with appropriate growth conditions, followed by a photo-assisted rapid thermal annealing (RTA) process. Approximately 500-A-thick SiOx layers are deposited on Si by PECVD at 250� C. with 0.02 W/cm-2 rf power, then covered with SiN or an evaporated thin aluminum layer, and subjected to a photo-assisted anneal in forming gas ambient at 350� C., resulting in an interface state density Dit in the range of about 1-4�1010 cm-2 eV-1, which sets a record for the lowest interface state density Dit for PECVD oxides fabricated to date. Detailed analysis shows that the PECVD deposition conditions, photo-assisted anneal, forming gas ambient, and the presence of an aluminum layer on top of the oxides during the anneal, all contributed to this low value of interface state density Dit. Detailed metal-oxide semiconductor analysis and model calculations show that such a low recombination velocity S is the result of moderately high positive oxide charge (5�1011 -1�1012 cm-2) and relatively low midgap interface state density (1�1010 -4�1010 cm-2 eV-1). Photo-assisted anneal was found to be superior to furnace annealing, and a forming gas ambient was better than a nitrogen ambient for achieving a very low surface recombination velocity S.
- Georgia Tech Patents