Floating-gate Analog Circuit

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Date
5/24/2005Author
Dugger, Jeffery Don
Hall, Tyson S.
Hasler, Paul
Anderson, David V.
Smith, Paul D.
Kucic, Matthew Raymond
Bandyopadhyay, Abhishek
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Show full item recordAbstract
In one exemplary embodiment, a programmable analog array (PAA) contains a configurable analog matrix having two floating-gate field effect transistors (FETs). Also contained in the PAA is an interconnect circuit that is programmable to configure the configurable analog matrix to operate in one or more of several matrix modes. A few examples of such matrix modes include a switching matrix mode, a memory matrix mode, and a computing matrix mode. In an exemplary method of configuring the PAA. PAA, the the method includes programming an interconnection, for example, between a first terminal of the first floating-gate FET and a first terminal of the second floating-gate FET. The method further includes programming an interconnection, for example, between a gate terminal of the first floating-gate FET and a fixed voltage source, for setting a floating gate charge on the first floating-gate FET.
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- Georgia Tech Patents [1761]