Capacitive Microaccelerometers And Fabrication Methods

Abstract

Disclosed are moveable microstructures comprising in-plane capacitive microaccelerometers, with submicro-gravity resolution (17 pF/g). The microstructures are fabricated in thick (>100 ?m) silicon-on-insulator (SOI) substrates or silicon substrates using a two-mask fully-dry release process that provides large seismic mass (>10 milli-g), reduced capacitive gaps, and reduced in-plane stiffness. Fabricated devices may be interfaced to a high resolution switched-capacitor CMOS IC that eliminates the need for area-consuming reference capacitors. The measured sensitivity is 83 mV/mg (17 pF/g) and the output noise floor is ?91 dBm/Hz at 10 Hz (corresponding to an acceleration resolution of 170 ng/?Hz). The IC consumes 6 mW power and measures 0.65 mm2 core area.