Thermal annealing and mechanical characterization study of electroplated copper in silicon trenches
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Microelectronic systems continue to move to towards 3-D integration to meet the increasing demands, Through-Silicon Vias (TSVs) play an important role in interconnecting stacked silicon dies. Various 3-D integration technologies have been proposed for microelectronic devices. TSV is the technology that can achieve the ultimate goal of 3-D integration. Although progress is being make in the fabrication of TSVs, experimental and theoretical study of their thermomechanical reliability have been widely studied. There still a gap to understand the copper microstructure in TSVs and similar structure. This work focus on how mechanical properties and microstructure change with thermal aging and thermal annealing in copper-filled TSVs and copper-plated silicon trenches. Both samples are fabricated in the cleanroom. Nano-indentation technique is applied to characterize mechanical properties and Electron backscatter diffraction (EBSD) technique used to characterize copper microstructure. Numerical models are created to simulate the thermo-mechanical stresses of copper with isotropic and anisotropic material property.