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dc.contributor.advisorSitaraman, Suresh K.
dc.contributor.authorSong, Yaqin
dc.date.accessioned2017-06-07T17:49:39Z
dc.date.available2017-06-07T17:49:39Z
dc.date.created2017-05
dc.date.issued2017-05-01
dc.date.submittedMay 2017
dc.identifier.urihttp://hdl.handle.net/1853/58340
dc.description.abstractMicroelectronic systems continue to move to towards 3-D integration to meet the increasing demands, Through-Silicon Vias (TSVs) play an important role in interconnecting stacked silicon dies. Various 3-D integration technologies have been proposed for microelectronic devices. TSV is the technology that can achieve the ultimate goal of 3-D integration. Although progress is being make in the fabrication of TSVs, experimental and theoretical study of their thermomechanical reliability have been widely studied. There still a gap to understand the copper microstructure in TSVs and similar structure. This work focus on how mechanical properties and microstructure change with thermal aging and thermal annealing in copper-filled TSVs and copper-plated silicon trenches. Both samples are fabricated in the cleanroom. Nano-indentation technique is applied to characterize mechanical properties and Electron backscatter diffraction (EBSD) technique used to characterize copper microstructure. Numerical models are created to simulate the thermo-mechanical stresses of copper with isotropic and anisotropic material property.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technology
dc.subjectTSV
dc.subjectCopper
dc.titleThermal annealing and mechanical characterization study of electroplated copper in silicon trenches
dc.typeThesis
dc.description.degreeM.S.
dc.contributor.departmentMechanical Engineering
thesis.degree.levelMasters
dc.contributor.committeeMemberBakir, Myhannad S.
dc.contributor.committeeMemberUme, Charles
dc.date.updated2017-06-07T17:49:40Z


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