High-performance organic field-effect transistors and circuits for 3D-shape substrates and applications

Abstract

In recent years, the performance of organic field-effect transistors has significantly improved in terms of their field-effect mobility and threshold voltage as well as their operational/environmental stability. As the current driving capability becomes higher, parasitic contact resistance at the metal-semiconductor interface starts to limit the performance of OFETs. Therefore, low contact resistance in OFETs is one of the key elements realizing high performance OFETs with ideal field-effect transistor characteristics. In addition, fabrication methods that connect transistors on a flexible substrate at room temperature is essential technology in the realization of flexible electronic devices. The traditional micro-fabrication methods are not suitable for use in the fabrication of OFETs because of high process temperatures over 500 oC, and chemical/mechanical damages to organic materials during the process. These methods also compromise the advantages of OFETs, which is low-cost fabrication on a large-area substrate. In this dissertation, high-performance top-gate organic field-effect transistors comprising a TIPS-pentacene/PTAA film and a CYTOP/metal-oxide bilayer were developed on flexible, shape-memory polymer substrates. In detail, the performance of the top-gate OFETs was improved remarkably by lowering the contact resistance at the metal-semiconductor interface employing a contact-doping method. The fabricated top-gate OFETs presented lowest contact resistance value in TIPS-pentacene-based OFETs ever reported in literature. The OFETs having low contact resistance were used as a backplane of OFET circuits combined with a newly developed patterning method of a CYTOP/metal-oxide gate dielectric layer, reverse stamping. Finally, high performance top-gate OFET circuits on a shape-memory polymer substrate were first demonstrated based on this dissertation work.