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dc.contributor.advisorTummala, Rao R.
dc.contributor.authorLu, Hao
dc.date.accessioned2018-01-22T21:11:06Z
dc.date.available2018-01-22T21:11:06Z
dc.date.created2017-12
dc.date.issued2017-11-01
dc.date.submittedDecember 2017
dc.identifier.urihttp://hdl.handle.net/1853/59238
dc.description.abstractThe objective of this PhD dissertation is to study the impact of redistribution layer (RDL) processes and their variations on the electrical performance of 50-ohm impedance matched transmission lines at 2 µm critical dimensions (CD) on glass interposers for 2.5D multi-die interconnections. The fundamental studies in this research focus on systematically analyze the signal performance impact due to process variations using 3D electro-magnetic simulations, and exploring several unit process methods to address the process challenges, leading to impedance controlled RDL design and fabrication guidelines. This dissertation represents the first systematic design and demonstration study of 50-ohm controlled impedance, 2 µm CD transmission lines on glass interposers. Semi-additive process was selected as the front-up method for multilayer RDL fabrication on glass interposers, mainly due to its scalability to both wafers and panels, and its compatibility with high throughput manufacturing. The emerging embedded trace method inspired from wafer level dual-damascene processes was also analyzed by electromagnetic simulations. The ultra-thin dielectric materials and photo embedded trench method for RDL fabrication for future research are discussed.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technology
dc.subjectMultilayer RDL
dc.subjectProcess variations
dc.subjectImpedance control
dc.subjectGlass interposer
dc.subjectSemi-additive process
dc.titleImpact of fabrication process variations on the electrical performance of impedance controlled 2 micron multilayer redistribution layers (RDL) on glass interposers
dc.typeDissertation
dc.description.degreePh.D.
dc.contributor.departmentElectrical and Computer Engineering
thesis.degree.levelDoctoral
dc.contributor.committeeMemberPeterson, Andrew F.
dc.contributor.committeeMemberBrand, Oliver
dc.contributor.committeeMemberSitaraman, Suresh K.
dc.contributor.committeeMemberSundaram, Venky
dc.date.updated2018-01-22T21:11:06Z


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