Global Placement for Quantum-dot Cellular Automata Based Circuits

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dc.contributor.author Nguyen, Jean
dc.contributor.author Ravichandran, Ramprasad
dc.contributor.author Lim, Sung Kyu
dc.contributor.author Niemier, Michael Thaddeus
dc.date.accessioned 2005-03-28T15:26:09Z
dc.date.available 2005-03-28T15:26:09Z
dc.date.issued 2003
dc.identifier.uri http://hdl.handle.net/1853/5938
dc.description.abstract Quantum Cellular Automata (QCA) has been proposed as an alternative architecture to CMOS and in principle should permit the implementation of ultra lower-power, nano-scale logic circuitry working at teraflop frequency. QCA is based on a new paradigm for encoding binary logic into electronic circuitry, where binary 1s and 0s are mapped to spatial configurations of electrons rather than magnitudes of electronic currents. The layout rules for QCA based circuits are radically different from those of CMOS based circuits, and design automation tools for QCA circuit layout are hard to find. This paper discusses the first automatic global placement algorithm for QCA-based circuits. We divide the QCA global placement process into zone partitioning and zone placement, and identify the constraints and objectives that are unique to QCA-based circuits as opposed to the conventional CMOS VLSI. en
dc.format.extent 382975 bytes
dc.format.mimetype application/pdf
dc.language.iso en_US
dc.publisher Georgia Institute of Technology en
dc.relation.ispartofseries CERCS;GIT-CERCS-03-20
dc.subject Automatic global placement algorithm en
dc.subject Design automation tools en
dc.subject Integrated circuit design en
dc.subject Low power en
dc.subject Nanoscale logic circuitry en
dc.subject QCA en
dc.subject Zone partitioning
dc.subject Zone placement
dc.subject Quantum cellular automata
dc.subject Teraflop frequency
dc.title Global Placement for Quantum-dot Cellular Automata Based Circuits en
dc.type Technical Report en


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