Fine-grain on-chip power management using digital and digitally-assisted linear voltage regulators

Abstract

On-chip voltage conversion and regulation right at the point-of-load using digital and digitally-assisted linear voltage regulators was proposed. On-chip voltage conversion and regulation minimizes power delivery network based power losses, improves voltage integrity and achieves fast and robust voltage delivery. Fine-grain temporal and spatial modulation of on-chip voltage levels further allows higher performance per watt in multi-core processors and big chips. Digital linear voltage regulators, designed in scaled CMOS processes based test-chips, were shown to provide digital process flow synthesis, ease of design, adaptation under changes and fast transient performance to power digital load circuits. These linear voltage regulators used adaptive, proactive and non-linear control techniques to achieve wide operational voltage and current range. Theoretical transient and steady-state operation models of digital linear voltage regulators were built to understand their operational dynamics, performance and stability. Digitally-assisted or hybrid linear voltage regulators, also designed in scaled CMOS processes based test-chips, further improved the noise rejection and voltage accuracy of digital linear voltage regulators. These designs were shown to be ideal candidates to power both noise-sensitive analog load circuits and digital load circuits. Theoretical operational models to gauge their stability and performance were presented. Role of these digital and digitally-assisted linear voltage regulators in achieving fine-grain on-chip power management and future directions of research are discussed.