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dc.contributor.authorChatterjee, Abhijit
dc.contributor.authorKook, S.
dc.contributor.authorGomes, A.
dc.contributor.authorJin, L.
dc.contributor.authorWheelright, D.
dc.date.accessioned2019-04-30T18:17:32Z
dc.date.available2019-04-30T18:17:32Z
dc.date.issued2010-11
dc.identifier.urihttp://hdl.handle.net/1853/61013
dc.descriptionIssued as final reporten_US
dc.description.abstractLinearity testing of high-precision (beyond 20-bit resolution) Analog-to-Digital converters (ADCs) is extremely expensive due to the large number of codes (>16 million for a 24-bit converter) that need to be tested and the associated low data rates making traditional histogram based testing infeasible. Industry often performs linearity test for such high-precision data converters with significantly reduced numbers of code measurements during production test. Given a specified allowed number of code measurements, the problem is to determine the requisite code points that result in the highest failure coverage. In this report, a methodology and tools for analyzing the “goodness” of a particular choice of test code points versus another is described. A least squares based polynomial fitting approach using measurements made at selected test code points is used to characterize the transfer function of the ADC for INL (Integral Nonlinearity) error. In addition, the characteristics of devices that may escape from the proposed approach (test escapes) are revealed for the specified test via an optimization based search technique. Software simulations are performed to study and validate the proposed methodology.en_US
dc.description.sponsorshipNational Semiconductor Corporationen_US
dc.language.isoen_USen_US
dc.publisherGeorgia Institute of Technologyen_US
dc.relation.ispartofseriesSchool of Electrical and Computer Engineering ; Project no. 115839en_US
dc.subjectAnalog-to-digital converteren_US
dc.subjectData convertersen_US
dc.titleOptimal linearity testing of sigma-delta based incremental ADCs using restricted code measurementsen_US
dc.title.alternativeTesting of high performance ADC'sen_US
dc.typeTechnical Reporten_US
dc.contributor.corporatenameGeorgia Institute of Technology. Office of Sponsored Programsen_US
dc.contributor.corporatenameGeorgia Institute of Technology. School of Electrical and Computer Engineeringen_US


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