Advances in panel glass packaging of mems and sensors for low stress and near hermetic reliability
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MEMS based sensing is gaining widespread adoption in consumer electronics as well as the next generation Internet of Things (IoT) market. Such applications serve as primary drivers towards miniaturization for increased component density, multi-chip integration, lower cost and better reliability. Traditional approaches like System-on-Chip (SoC) and System on Board (SoB) are not ideal to address these challenges and there is a need to find solutions at package level, through heterogeneous package integration (HPI). However, existing MEMS packaging techniques like laminate/ceramic substrate packaging and silicon wafer level packaging face challenges like standardization, heterogeneous package integration and form factor miniaturization. Besides, application specific packages take up the largest fraction of the total manufacturing cost. Therefore, advanced packaging of MEMS sensors for HPI plays a critical role in the short and long run towards the SOP vision. This dissertation demonstrates a low stress, reliable, near-hermetic ultra-thin glass cavity MEMS packages as a solution that combines the advantages of LTCC/laminate substrates and silicon wafer level packaging while also addressing their limitations. These glass based cavity packages can be scaled down to 2x smaller form factors (<500μm) and are fabricated out of large panel fabrication processes thereby addressing the cost and form factor requirements of MEMS packaging. Flexible cavity design, advances in through-glass via technologies and dimensional stability of thin glass also enable die stacking and 3D assembly for sensor-processor integration towards sensor fusion. The following building block technologies were explored: (a) reliable cavity formation in thin glass panels (b) low stress glass-glass bonding, and (c) high throughput, fully filled through-package-via metallization in glass. Three main technical challenges were overcome to realize the objectives: (a) glass cracking, side wall taper, side wall roughness and defects, (b) interfacial voids at glass-polymer-glass interface and (c) electrical opens and high frequency performance of copper paste filled through-package-vias in glass.