Design and tool solutions for energy-efficient reliable monolithic 3D ICs
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The objective of this dissertation is to analyze and identify the benefits and challenges of energy-efficient and reliable monolithic 3D (M3D) ICs, and to develop physical design and tool solutions to address the challenges. The physical design and tool challenges of M3D ICs are addressed with categorizing them into four major projects, high-performance and low-power M3D ICs, new M3D IC design flow, power supply integrity of M3D ICs, and M3D ICs for deep neural network hardware. In the first project, the performance and power beneﬁts of M3D ICs in advanced technology nodes are analyzed, and optimization methodologies are presented to maximize the performance and to minimize the power consumption. In the second project, an in-depth analysis on the power beneﬁts of M3D ICs is performed, and a new M3D IC design ﬂow is devised based on the observations. For the third project, power supply integrity issues of M3D stacking technology are addressed, and the optimization methodologies are presented. Lastly, the challenges in deep neural network (DNN) hardware and the impact of M3D ICs are examined as implementing low-power and high-performance DNN hardware is known to be difﬁcult albeit they are widespread and powerful in recognition tasks. This dissertation demonstrates the potential of M3D ICs and paves the way for more research to combat manufacturing, thermal, process variation and EDA tool challenges associated with M3D stacking technology.