• Login
    View Item 
    •   SMARTech Home
    • Georgia Tech Theses and Dissertations
    • Georgia Tech Theses and Dissertations
    • View Item
    •   SMARTech Home
    • Georgia Tech Theses and Dissertations
    • Georgia Tech Theses and Dissertations
    • View Item
    JavaScript is disabled for your browser. Some features of this site may not work without it.

    Covert/side channel analysis, modeling and capacity estimation

    Thumbnail
    View/Open
    YILMAZ-DISSERTATION-2020.pdf (17.62Mb)
    Date
    2020-04-07
    Author
    Yilmaz, Baki Berkay Berkay
    Metadata
    Show full item record
    Abstract
    Side/Covert channels are asynchronous channels which are not designed nor intended to transfer information. These channels are generated as a byproduct of performing legitimate program activities on the hardware of computer systems. Although there are many approaches to analyze and estimate their information leakage capacity, they do not consider 1) asynchronous nature of side/covert channels, 2) variability inexecution time of each instruction, and 3) interrupts due to other software activities. Ignoring any of these features can result in underestimating the severity of information leakage, and inaccurate models that can mislead the analysis of these channels. To successfully evaluate the severity of side/covert channels, our research has 1)modeled the side channels considering the dependency among instructions as a consequence of processor pipeline and program functionality, 2) modeled and analyzed an electromagnetic (EM) covert channel, generated due to computer activities, and proposed bounds for the capacity of these channels, 3) introduced a generalized model for covert channels with different sources (i.e. power, cache, EM, etc.) and an assessment methodology to analyze systems against attacks based on these channels, and 4) modeled side channel signals emanated while executing instruction sequences on a processor, which leverages design-stage investigation of new products. The work provides a deep understanding of side/covert channels generated by program activities which can be utilized to secure devices by optimizing their designs to minimize information leakage.
    URI
    http://hdl.handle.net/1853/62810
    Collections
    • Georgia Tech Theses and Dissertations [23877]
    • School of Electrical and Computer Engineering Theses and Dissertations [3381]

    Browse

    All of SMARTechCommunities & CollectionsDatesAuthorsTitlesSubjectsTypesThis CollectionDatesAuthorsTitlesSubjectsTypes

    My SMARTech

    Login

    Statistics

    View Usage StatisticsView Google Analytics Statistics
    facebook instagram twitter youtube
    • My Account
    • Contact us
    • Directory
    • Campus Map
    • Support/Give
    • Library Accessibility
      • About SMARTech
      • SMARTech Terms of Use
    Georgia Tech Library266 4th Street NW, Atlanta, GA 30332
    404.894.4500
    • Emergency Information
    • Legal and Privacy Information
    • Human Trafficking Notice
    • Accessibility
    • Accountability
    • Accreditation
    • Employment
    © 2020 Georgia Institute of Technology