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dc.contributor.advisorZajic, Alenka
dc.contributor.advisorPrvulovic, Milos
dc.contributor.authorYilmaz, Baki Berkay Berkay
dc.date.accessioned2020-05-20T17:01:32Z
dc.date.available2020-05-20T17:01:32Z
dc.date.created2020-05
dc.date.issued2020-04-07
dc.date.submittedMay 2020
dc.identifier.urihttp://hdl.handle.net/1853/62810
dc.description.abstractSide/Covert channels are asynchronous channels which are not designed nor intended to transfer information. These channels are generated as a byproduct of performing legitimate program activities on the hardware of computer systems. Although there are many approaches to analyze and estimate their information leakage capacity, they do not consider 1) asynchronous nature of side/covert channels, 2) variability inexecution time of each instruction, and 3) interrupts due to other software activities. Ignoring any of these features can result in underestimating the severity of information leakage, and inaccurate models that can mislead the analysis of these channels. To successfully evaluate the severity of side/covert channels, our research has 1)modeled the side channels considering the dependency among instructions as a consequence of processor pipeline and program functionality, 2) modeled and analyzed an electromagnetic (EM) covert channel, generated due to computer activities, and proposed bounds for the capacity of these channels, 3) introduced a generalized model for covert channels with different sources (i.e. power, cache, EM, etc.) and an assessment methodology to analyze systems against attacks based on these channels, and 4) modeled side channel signals emanated while executing instruction sequences on a processor, which leverages design-stage investigation of new products. The work provides a deep understanding of side/covert channels generated by program activities which can be utilized to secure devices by optimizing their designs to minimize information leakage.
dc.format.mimetypeapplication/pdf
dc.language.isoen_US
dc.publisherGeorgia Institute of Technology
dc.subjectCovert channels
dc.subjectSide channels
dc.subjectSecurity
dc.subjectInformation-theoretic security
dc.subjectModeling
dc.subjectCyber security
dc.titleCovert/side channel analysis, modeling and capacity estimation
dc.typeDissertation
dc.description.degreePh.D.
dc.contributor.departmentElectrical and Computer Engineering
thesis.degree.levelDoctoral
dc.contributor.committeeMemberBloch, Matthieu R.
dc.contributor.committeeMemberKeromytis, Angelos D.
dc.contributor.committeeMemberDurgin, Gregory D.
dc.contributor.committeeMemberOrso, Alessandro
dc.date.updated2020-05-20T17:01:32Z


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