PLUG-AND-PLAY FOSS ML ACCELERATOR : FROM CONCEPT TO CONCEPTION
Immanuel, Yehowshua U.
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ML accelerators are a fairly new research area and it is important that the archi- tecture community is able to iterate quickly on architectural exploration. Although there are a number of commercial Deep Neural Network(DNN) accelerators avail- able on the market and a plethora of creative ML architectures have been proposed in Academia, there exist only a few end-to-end DNN accelerators implementations which academics can readily study and use to inform future DNN accelerator devel- opments. A number of tools have recently surfaced to help address this need. Some of these include advanced RTL design tools and compilers that consume ML framework out- put and emit instructions for custom accelerators. However, creating an end-to-end accelerator is still quite difficult. There are a number of hurdles to overcome including writing drivers, achieving high transfer speeds between host and accelerator, modi- fying compilers to support custom hardware, choosing a the correct bus to support connecting the accelerator fabric to the chosen memory system, and even choosing the right RTL. This thesis documents the process of building an end-to-end accelerator complete with a custom compiler in the hopes that highlighting the most difficult parts of creating complete accelerator systems informs the techniques used by future architects and system designers.