Ferroelectric Field-Effect Transistors for Future Non-Volatile Memory: Challenges and Solutions

Abstract

Machine learning and artificial intelligence demand new non-volatility memory technologies suitable for in-memory computing and data-intensive applications with high integration density, ultra-fast read and write speed, and high energy efficiency. However, current memory technologies either suffer from low integration density or high energy consumption. Ferroelectric Field-Effect transistor (FeFET), by including a non-volatile ferroelectric layer in the gate oxide stack of a traditional MOSFET, finds a niche in such applications due to its low write voltage, nanoseconds read and write speed, and compact device size. With these features, FeFETs bridge the performance gap between computing units and memory systems as well as the latency gap between DRAM and Flash technology within the memory hierarchy. However, such promising features of FeFETs are challenged by problems including endurance degradation, read-after-write delay, device-to-device variation, and retention. In this dissertation, we performed both experimental and theoretical studies to overcome the two of these problems, with a focus on endurance degradation and read-after-write delay. Solutions to endurance degradation and read-after-write delay are demonstrated to increase the endurance by 6 to 100 times and reduce the read-after-write delay by 105 times.