Experimentation with Configurable, Lightweight Threads on a KSR Multiprocessor
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The implementation of operating system functions can significantly affect the performance of parallel programs. Our research concerns the customization of operating system functionality for different target hardware to improve the performance of application programs. In this paper, we describe our experience with a reconfigurable, multiprocessor Mach cthreads package on a 32-node KSR-1 supercomputer. Sample static and dynamic configurations address the exchange and on-line adaptation of threads schedulers, and the on-line adaptation of threads synchronization constructs. Experimental results are demonstrated with two different parallel application programs, (1) a parallel branch-and-bound application and (2) the runtime kernel of a Time Warp discrete event simulator. The lightweight threads package has been ported to several target architectures, including Sparcstations, a 32-node GP1000 BBN Butterfly, SGI multiprocessors, and the 32-node Kendall Square Supercomputer.