Shared Address Space I/O: A Novel I/O Approach for System-on-a-Chip Networking

Abstract

For real-time system-on-a-chip (SoC) network applications, high-speed and low-latency network I/O is the key to achieve predictable execution and high performance. Existing network I/O approaches are either not directly suited to SoC applications, or too complicated and expensive. This paper introduces a novel approach, referred to as shared address space I/O, for real-time SoC network applications. This approach facilitates building of heterogeneous multiprocessor systems with application intensive processors (main processor) and I/O intensive processors (I/O processor), where network I/O processing can be offloaded to a specialized I/O processor. With the shared address space I/O approach, in such a system, communication and synchronization between main and I/O processors can be implemented with a shared address space. This approach is realized through Atalanta, a heterogeneous real-time SoC operating system we have developed. In this paper, we demonstrate that shared address space I/O can provide high-speed and low-latency network I/O for SoC network applications.