An accurate, trimless, high PSRR, low-voltage, CMOS bandgap reference IC

Show simple item record Gupta, Vishal en_US 2007-08-16T17:42:43Z 2007-08-16T17:42:43Z 2007-07-05 en_US
dc.description.abstract Bandgap reference circuits are used in a host of analog, digital, and mixed-signal systems to establish an accurate voltage standard for the entire IC. The accuracy of the bandgap reference voltage under steady-state (dc) and transient (ac) conditions is critical to obtain high system performance. In this work, the impact of process, power-supply, load, and temperature variations and package stresses on the dc and ac accuracy of bandgap reference circuits has been analyzed. Based on this analysis, the a bandgap reference that 1. has high dc accuracy despite process and temperature variations and package stresses, without resorting to expensive trimming or noisy switching schemes, 2. has high dc and ac accuracy despite power-supply variations, without using large off-chip capacitors that increase bill-of-material costs, 3. has high dc and ac accuracy despite load variations, without resorting to error-inducing buffers, 4. is capable of producing a sub-bandgap reference voltage with a low power-supply, to enable it to operate in modern, battery-operated portable applications, 5. utilizes a standard CMOS process, to lower manufacturing costs, and 6. is integrated, to consume less board space has been proposed. The functionality of critical components of the system has been verified through prototypes after which the performance of the complete system has been evaluated by integrating all the individual components on an IC. The proposed CMOS bandgap reference can withstand 5mA of load variations while generating a reference voltage of 890mV that is accurate with respect to temperature to the first order. It exhibits a trimless, dc 3-sigma accuracy performance of 0.84% over a temperature range of -40°C to 125°C and has a worst case ac power-supply ripple rejection (PSRR) performance of 30dB up to 50MHz using 60pF of on-chip capacitance. All the proposed techniques lead to the development of a CMOS bandgap reference that meets the low-cost, high-accuracy demands of state-of-the-art System-on-Chip environments. en_US
dc.publisher Georgia Institute of Technology en_US
dc.subject Lateral PNP en_US
dc.subject Trimming en_US
dc.subject System-on-Chip en_US
dc.subject SoC en_US
dc.subject Regulated reference en_US
dc.subject PSRR en_US
dc.subject Output impedance en_US
dc.subject Accuracy en_US
dc.subject Trimless en_US
dc.subject Bandgap references en_US
dc.subject Low-voltage en_US
dc.subject CMOS en_US
dc.subject Analog circuit design en_US
dc.title An accurate, trimless, high PSRR, low-voltage, CMOS bandgap reference IC en_US
dc.type Dissertation en_US Ph.D. en_US
dc.contributor.department Electrical and Computer Engineering en_US
dc.description.advisor Committee Chair: Rincon-Mora, Gabriel; Committee Member: Ayazi, Farrokh; Committee Member: Bhatti, Pamela; Committee Member: Leach, W. Marshall; Committee Member: Morley, Thomas en_US

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