Architectural support for improving security and performance of memory sub-systems

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Please use this identifier to cite or link to this item: http://hdl.handle.net/1853/26663

Title: Architectural support for improving security and performance of memory sub-systems
Author: Yan, Chenyu
Abstract: This thesis explores architectural level optimizations to make secure systems more efficient, secure and affordable. It extends prior work for secure architecture in several areas. It proposes a new combined memory encryption and authentication scheme which uses very small on-chip storage area and incurs much less performance overhead compared with prior work. In addition, the thesis studies the issues of applying architectural support for data security to distributed shared memory systems. It presents a scheme which is scalable with large-scale systems and only introduces negligible performance overhead for confidentiality and integrity protection. Furthermore, the thesis also investigates another source of reducing performance overhead in secure systems through optimizing on-chip caching schemes and minimizing off-chip communications.
Type: Dissertation
URI: http://hdl.handle.net/1853/26663
Date: 2008-11-17
Publisher: Georgia Institute of Technology
Subject: Architecture
Security
GCM
Memory
Encryption
Authentication
Computer security
Copyright and electronic data processing
Data protection
Data encryption (Computer science)
Authentication
Department: Computing
Advisor: Committee Chair: Milos Prvulovic; Committee Member: Gabriel Loh; Committee Member: Hyesoon Kim; Committee Member: Umakishore Ramachandran; Committee Member: Yan Solihin
Degree: Ph.D.

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