60 GHz CMOS pico-joule/bit OOK receiver design for multi-gigabit per second wireless communications

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Please use this identifier to cite or link to this item: http://hdl.handle.net/1853/29723

Title: 60 GHz CMOS pico-joule/bit OOK receiver design for multi-gigabit per second wireless communications
Author: Juntunen, Eric Andrew
Abstract: Component design for a proposed 60 GHz short-range low-power high-data-rate On-Off Keying receiver in a 90 nm CMOS process is presented. The advances in RFCMOS and the commercial need for high data-rate wireless links are discussed as the enabling technology and motivation for research into the development of 60 GHz CMOS radios for wireless personal area networks. System level calculations are presented validating the feasibility of the proposed receiver topology for its target application. The design and simulation results of a 60 GHz low noise amplifier, 60 GHz direct-conversion demodulator (which has generated an invention disclosure), and a baseband amplifier are discussed in detail. Also presented is a discussion of device modeling techniques for millimeter-wave designs. Measured results are presented for the demodulator. Finally, recommendations for future work are presented.
Type: Thesis
URI: http://hdl.handle.net/1853/29723
Date: 2008-06-03
Publisher: Georgia Institute of Technology
Subject: Millimeter wave
Wireless
Receiver
Gbps
Wireless communication systems
Gigabit communications
Metal oxide semiconductors, Complementary
Department: Electrical and Computer Engineering
Advisor: Committee Chair: Laskar, Joy; Committee Member: Cressler, John; Committee Member: Tentzeris, Manos
Degree: M.S.

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